Comparison of ARMv7-A cores

This is a table comparing microarchitectures which implement the ARMv7-A (A means Application[1]) instruction set architecture and mandatory or optional extensions of it, the last AArch32.

Table

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Core Decode width Execution ports Pipeline depth Out-of-order execution FPU Pipelined VFP FPU registers NEON
(SIMD)
big.LITTLE role Virtualization[2] Process technology L0 cache L1 cache L2 cache Core configurations Speed per core
(DMIPS/MHz)
ARM Cortex-A5 1 8 No VFPv4 (optional) 16 × 64-bit 64-bit wide (optional) No 40/28 nm 4–64 KB / core 1, 2, 4 1.57
ARM Cortex-A7 2 5[3] 8 No VFPv4 Yes 16 × 64-bit 64-bit wide LITTLE Yes[4] 40/28 nm 8–64 KB / core up to 1 MB (optional) 1, 2, 4, 8 1.9
ARM Cortex-A8 2 2[5] 13 No VFPv3 No 32 × 64-bit 64-bit wide No 65/55/45 nm 32 KB + 32 KB 256 or 512 (typical) KB 1 2.0
ARM Cortex-A9 2 3[6] 8–11 [7] Yes VFPv3 (optional) Yes (16 or 32) × 64-bit 64-bit wide (optional) Companion Core No[7] 65/45/40/32/28 nm 32 KB + 32 KB 1 MB 1, 2, 4 2.5
ARM Cortex-A12 3 11 Yes VFPv4 Yes 32 × 64-bit 128-bit wide No[8] 28nm 32-64 KB + 32 KB 256 KB to 8 MB 1, 2, 4 3.0
ARM Cortex-A15 3 8[3] 15/17-25 Yes VFPv4 Yes 32 × 64-bit 128-bit wide big Yes[9] 32/28/20 nm 32 KB + 32 KB per core up to 4 MB per cluster, up to 8 MB per chip 2, 4, 8 (4×2) 3.5 to 4.01
ARM Cortex-A17 3 11+ Yes VFPv4 Yes 32 × 64-bit 128-bit wide big 28nm 32 KB + 32 KB per core 256 KB up to 8 MB up to 4 4.0
Qualcomm Scorpion 2 3[10] 10 Yes (FXU&LSU Only)[11] VFPv3 Yes 128-bit wide No 65/45 nm 32 KB + 32 KB 256 KB (single-core)
512 KB (dual-core)
1, 2 2.1
Qualcomm Krait[12] 3 7 11 Yes VFPv4[13] Yes 128-bit wide No 28 nm 4 KB + 4 KB direct mapped 16 KB + 16 KB 4-way set associative 1 MB 8-way set associative (dual-core)/2 MB (quad-core) 2, 4 3.3 (Krait 200)
3.39 (Krait 300)
3.39 (Krait 400)
3.51 (Krait 450)
Apple Swift 3 12 Yes VFPv4 Yes 32 × 64-bit 128-bit wide No 32 nm 32 KB + 32 KB 1 MB 2 3.5

See also

References

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