Vision processing unit

A vision processing unit is (as of 2016) an emerging class of microprocessor; it is a specific type of AI accelerator , designed to accelerate machine vision tasks.[1][2]


Overview

Vision processing units are distinct from video processing units (which are specialised for video encoding and decoding) in their suitability for running machine vision algorithms such as convolutional neural networks, SIFT etc.

They may include direct interfaces to take data from cameras (bypassing any off chip buffers), and have a greater emphasis on on-chip dataflow between many parallel execution units with scratchpad memory, like a manycore DSP. But, like video processing units, they may have a focus on low precision fixed point arithmetic for image processing.

Contrast with GPUs

They are distinct from GPUs, which contain specialised hardware for rasterization and texture mapping (for 3D graphics), and whose memory architecture is optimised for manipulating bitmap images in off-chip memory (reading textures, and modifying frame buffers, with random access patterns).

Target markets are robotics, the internet of things, new classes of digital cameras for virtual reality and augmented reality, smart cameras, and integrating machine vision acceleration into smartphones and other mobile devices.

Examples

Similar processors

Some processors are not described as VPUs, but are equally applicable to machine vision tasks. These may form a broader category of AI accelerators (to which VPUs may also belong), however as of 2016 there is no consensus on the name:

See also

References

  1. Seth Colaner, Matthew Humrick (January 3, 2016). "A third type of processor for AR/VR: Movidius' Myriad 2 VPU". Tom's Hardware.
  2. Prasid Banerje (March 28, 2016). "The rise of VPUs: Giving Eyes to Machines". Digit.in.
  3. Weckler, Adrian. "Dublin tech firm Movidius to power Google's new virtual reality headset". Independent.ie. Retrieved 15 March 2016.
  4. Fred O'Connor (May 1, 2015). "Microsoft dives deeper into HoloLens details: 'Holographic processor' role revealed". PCWorld.
  5. Chen, Yu-Hsin and Krishna, Tushar and Emer, Joel and Sze, Vivienne (2016). "Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks". IEEE International Solid-State Circuits Conference, ISSCC 2016, Digest of Technical Papers. pp. 262–263.
  6. "Introducing Qualcomm Zeroth Processors: Brain-Inspired Computing". Qualcomm. October 10, 2013.

External links

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