Eby Friedman

Eby G. Friedman is a Fellow of the IEEE^[1] and Distinguished Professor at the University of Rochester in the fields of integrated circuits, VLSI design and analysis, clock synchronization, power delivery, 3-D integration, and mixed-signal circuits. Professor Friedman is also a Visiting Professor at the Technion - Israel Institute of Technology.^[2] Born in Jersey City, New Jersey in 1957, he received a Ph.D. degree from the University of California, Irvine in Electrical Engineering.^[2] Professor Friedman is married to Laurie Friedman and they have two sons.

Academic Leadership and Service

• Fellow of the IEEE^[3]
• Past Editor-in-Chief and Chair of the steering committee for the IEEE Transactions on Very Large Scale Integration (VLSI) Systems ^[4]
• Past Regional Editor of the Journal of Circuits, Systems and Computers^[5]
• Past member of the editorial board of the Analog Integrated Circuits and Signal Processing^[6]
• Editor-in-Chief of the Microelectronics Journal ^[7]
• Member of the editorial board of the Journal of Low Power Electronics ^[8]
• Past member of the editorial board of the Journal of VLSI Signal Processing ^[9]
• Distinguished Lecturer of the IEEE CAS Society^[10][11]
• Past member of the editorial board of the Proceedings of the IEEE and IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing^[12]
• Past member of the IEEE Circuits and Systems (CAS) Society Board of Governors,CAS liaison to the IEEE Solid-State Circuits Society (SSCS)
• Past Chair of the VLSI Systems and Applications IEEE Circuits and Systems Society Technical Committee^[13]
• Past Chair of the Electron Devices Chapter of the IEEE Rochester Section
• General/Program/Technical Co-Chair of the 1997 International Workshop on Clock Distribution Networks^[14]
• Chair of the 2000 IEEE Workshop on Signal Processing Systems^[15]
• Chair of the 2003 and 2004 IEEE International Workshop on System-on-Chip for Real-Time Applications ^[16]
• Chair of the 2004 IEEE International Conference on Electronics, Circuits, and Systems ^[17]
• Chair of the 2006 IEEE International Symposium on Circuits and Systems^[18]
• Chair of the 2007 IEEE International Symposium on Networks on Chip (NoC) ^[19]

Selected bibliography

Books

• Clock Distribution Networks in VLSI Circuits and Systems (IEEE Press, 1995)^[20]
• High Performance Clock Distribution Networks (Kluwer Academic Publishers, 1997)^[20]
• Analog Design Issues in Digital VLSI Circuits and Systems (Kluwer Academic Publishers, 1997)^[20]
• Timing Optimization through Clock Skew Scheduling ( 2000 and 2009)(first and second edition)^[20]
• On-Chip Inductance in High Speed Integrated Circuits (Kluwer Academic Publishers, 2001)^[21]
• Power Distribution Networks in High Speed Integrated Circuits (Kluwer Academic Publishers, 2004)^[22]
• Multi-Voltage CMOS Circuit Design (John Wiley & Sons Press, 2006)^[23]
• Power Distribution Networks with On-Chip Decoupling Capacitors (Springer Verlag, 2008 and 2011)(first and second edition) ^[24]
• Three-Dimensional Integrated Circuit Design (Morgan Kaufmann, 2009)^[25]
• High Performance Integrated Circuit Design (McGraw-Hill Publishers, 2012) ^[26]
• J. Rosenfeld and E. G. Friedman, On-Chip Resonance in Nano scale Integrated Circuits: Design and Analysis Methodologies for Advanced Data, Clock, and Power Generation Networks^[27]
• D. Velenis and E. G. Friedman, Delay Uncertainty in High Performance Clock Distribution Networks Issues and Solutions ^[28]
• M. El-Moursy and E. Friedman, On-Chip Inductive Interconnect Design Methodologies^[29]
• Professor Friedman has published almost 500 papers and is co-inventor of 13 patents in the fields of high speed and low power CMOS design techniques, interconnect and substrate noise, pipelining and retiming, three-dimensional integration, and the theory and application of power and synchronous clock distribution networks.^[30]

Articles

• I. Vaisband, B. Price, S. Kose, Y. Kolla, E. G. Friedman, and J. Fischer, " Distributed LDO Regulators in a 28 nm Power Delivery System," Analog Integrated Circuits and Signal Processing, Volume 83, Issue 3, pp. 295 – 309, 2015.^[20]
• I. Vaisband and E. G. Friedman, " Energy Efficient Clustering of On-Chip Power Delivery Systems," Integration, the VLSI Journal, Volume 48, pp. 1 – 9, 2015.^[20]
• M. Kazemi, E. Ipek, and E. G. Friedman, " Adaptive Compact Magnetic Tunnel Junction Model," IEEE Transactions on Electron Devices, Vol. 61, No. 11, pp. 3883–3891, November 2014.^[20]
• S. Kvatinsky, N. Wald, G. Satat, E. G. Friedman, A. Kolodny, and U. C. Weiser, " Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 10, pp. 2054–2066, October 2014.^[20]
• A. Shapiro and E. G. Friedman, " MOS Current Mode Logic Near Threshold Circuits," Journal on Low Power Electronics and Applications, Volume 4, pp. 138 – 152, 2014.^[20]
• R. Patel, E. Ipek, and E. G. Friedman, " 2T - 1R STT-MRAM Memory Cells for Enhanced Sense Margin and On/Off Current Ratio," Microelectronics Journal, Volume 45, Issue 2, pp. 133 – 143, February 2014.^[20]
• S. Kvatinsky, Y. H. Nacson, Y. Etsion, E. G. Friedman, A. Kolodny, and U. C. Weiser, " Memristor-Based Multithreading," IEEE Computer Architecture Letters, Vol. 13, No. 1, pp. 41 – 44, January–June 2014.^[20]
• Friedman, Eby G. "Clock distribution networks in synchronous digital integrated circuits." Proceedings of the IEEE 89.5 (2001): 665-692.
• Ismail, Yehea, and Eby G. Friedman. "Effects of inductance on the propagation delay and repeater insertion in VLSI circuits." Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 8.2 (2000): 195-206.
• Ismail, Yehea, Eby G. Friedman, and Jose L. Neves. "Figures of merit to characterize the importance of on-chip inductance." Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 7.4 (1999): 442-449.
• Hauryla, Mikhail, et al. "On-chip optical interconnect roadmap: challenges and critical directions." Selected Topics in Quantum Electronics, IEEE Journal of12.6 (2006): 1699-1705.

References