NEAT chipset

Motherboard with NEAT chipset for the Intel 80286

The NEAT chipset (the acronym standing for "New Enhanced AT") was a 3-chip chipset for IBM PC compatible computers. It was developed by Chips and Technologies.^[1]

History

The NEAT chipset descended from the first chipset that C&T had developed for IBM XT-compatible systems, which was based around the 82C100 "XT controller" chip. This chip incorporated the functionality of what had been, until its invention, discrete TTL chips on the XT's mainboard, namely:^[2]

• the 8284 clock generator
• the 8288 bus controller
• the 8254 Programmable Interval Timer
• the 8255 parallel I/O interface
• the 8259 Programmable Interrupt Controller
• the 8237 DMA controller

The central chip of the NEAT chipset was C&T's 82C206 chip, introduced by C&T in 1986. This chip, like its predecessor the 82C100, provided equivalent functionality to the TTL chips on the PC/AT's mainboard, namely:^[1]

• the 82284 clock generator
• the 82288 bus controller
• the 8254 Programmable Interval Timer
• the two 8259 Programmable Interrupt Controllers
• the two 8237 DMA controllers
• the MC146818 NVRAM/RTC chip

NEAT (more officially called CS8221) was actually not the first chipset based on the 82C206, but its predecessor lacked a catchy name, being simply called CS8220. The CS8220 chipset required four extra chips (mainly buffers and memory controllers) for a virtually complete motherboard, while NEAT required only three.^[1]

The successor to the NEAT chipset was the SCAT chipset, which amalgamated all of the chips of the NEAT chipset into a single chip, the 82C836.^[1] The DS8223 LEAP chipset provided support for LIM EMS 4.0.^[3]

Other manufacturers

Other manufacturers produced equivalent chips. OPTi, for example, produced a two-chip "AT controller" chipset comprising the OPTi 82C206 and 82C495XLC, which was found in many early 80486 and Pentium AT-compatible machines. The OPTi 82C206 provided equivalent functionality to:^[2]

• an 8254 Programmable Interval Timer
• two 8259 Programmable Interrupt Controllers
• two 82437 DMA controllers
• a MC146818 NVRAM/RTC chip
• a 74LS612 Memory Mapper chip

The 82C495XLC incorporated the additional memory controller and shadow RAM support.^[2]

References

1. 1 2 3 4 Scott Mueller (2003). Upgrading and Repairing PCs. Que Publishing. p. 230. ISBN 9780789729743. 
2. 1 2 3 Michael H. Tooley (2005). PC Based Instrumentation and Control. Elsevier. p. 32. ISBN 9780750647168. 
3. ↑ http://contents.driverguide.com/content.php?id=353297&path=LEAPEMM.TXT